How to suppress interference in concentrator voltage sampling?

The concentrator voltage sampling uses a resistor divider network to reduce the mains voltage (e.g., 220VAC) to a low voltage, which easily introduces common-mode and differential-mode interference. Suppression requires addressing the voltage divider network design, filtering, and shielding. High-precision, low-temperature-drift thin-film resistors (±0.1%) are selected for the voltage divider, and a symmetrical layout is used to reduce parasitic capacitance imbalance. An RC low-pass filter is inserted between the voltage divider point and the ADC input, with a 1kΩ resistor, a 10nF capacitor, and a cutoff frequency of approximately 16kHz. For common-mode interference, matching Y capacitors (e.g., 2.2pF/2kV) can be connected to ground at the high-voltage and low-voltage ends of the voltage divider network, respectively. If the sampling line is external, shielded twisted-pair cable is used, with the shield grounded at a single point. On the PCB, the voltage divider and filter components are placed close to the ADC and surrounded by a grounded guard trace. This solution can attenuate high-frequency noise (>10kHz) by 40dB, and the power frequency sampling accuracy error is less than 0.2%.