How to design an EFT protection filter circuit for a data center switch?

The EFT protection filter circuit for data center switches needs to be optimized for 5kHz/100kHz repetition frequencies. The core architecture is as follows: a common-mode inductor CMZ7060A-701T (700Ω@100MHz) from Etymotic is connected in series at the power input to provide high-frequency impedance. After that, a 0.47μF (275VAC) X2 capacitor and a 2200pF (400VAC) Y2 capacitor are connected in parallel to form a CLC filter. A PBZ1608A-102Z0T ferrite bead (1000Ω@100MHz) is connected in series at the signal port and a 100pF/50V capacitor to ground is used to form a low-pass filter. The PCB layout requires strict separation of the filter input and output, and no overlap of ground planes to avoid coupling. The actual measurement of this filter shows that the insertion loss is >30dB in the 1MHz-100MHz frequency band, and the port voltage is <5V when EFT ±4kV injection, which meets the IEC61000-4-4 Class A standard.