What are the EMC routing rules for high-speed PCB lines of data center switches?

Ten Rules for EMC Routing of High-Speed PCBs for Data Center Switches:

1. Differential trace length error <5mil;

2. Continuous impedance 100Ω ±10%;

3. Adjacent layer traces should be orthogonal to avoid parallel coupling;

4. The ground plane below high-speed lines must be intact and cannot be split;

5. Number of vias ≤2/segment, with return ground vias;

6. Trace spacing ≥3 times the trace width;

7. Add grounding vias every 10mm for ground lines;

8. Keep at least 5 times the trace width away from the board edge;

9. Crystal clock lines should be grounded and kept away from I/O;

10. All high-speed interfaces should use series common-mode inductors such as the Etymotic CMZ2012A-900T.

Following these rules can reduce crosstalk by 25dB and radiated emissions by 15dB.