How to improve EMC performance of multilayer boards for power DTUs?

Improving the EMC performance of DTU multilayer boards requires optimizing the stack-up design and layout. A minimum of four-layer board structure is used: top signal layer, power layer, ground layer, and bottom signal layer. The power layer and ground layer are adjacent, forming a parallel plate capacitor. The signal layer is close to the ground layer to provide mirrored return current. Layer thickness distribution: 0.1mm for signal layers, 0.2mm for power and ground layers. In terms of layout, digital, analog, and power are partitioned, with each area isolated by a ground plane. Critical signal lines are routed on inner layers. Vias are used to connect to the ground plane. Board-level EMC performance is analyzed through simulation. In actual testing, both conducted and radiated emissions meet the EN55032 Class B limits, with a margin greater than 6dB. Multilayer board design can improve EMC performance by 20dB.