How can differential-mode filtering in power FTUs not affect sampling?

Differential-mode filtering needs to maintain the integrity of the sampled signal while suppressing noise. The design employs a low-distortion filtering topology. Current sampling uses a second-order active low-pass filter with an AD8629 operational amplifier, a cutoff frequency of 2kHz, and a gain error of less than 0.01%. Voltage sampling uses an RC filter (100Ω + 100nF) with a time constant of 10μs, coupled with ESD protection (3V3D3B). PCB design: The filter circuit is placed close to the sensor, using differential traces with 100Ω impedance matching. C0G capacitors are used, with a temperature coefficient of ±30ppm/℃ and negligible voltage coefficient. This design achieves a differential-mode filter with an amplitude impact of less than 0.1% on the sampled signal, a phase delay of less than 1°, and noise suppression exceeding 30dB, meeting the IEC 61869 standard's 0.2 accuracy requirement.