
To prevent the FTU from malfunctioning during voltage dips, power supply hold-up and software fault tolerance are required. Hardware: A large-capacity capacitor bank (e.g., 10000μF/100V) is added to the front end of the power supply, with a hold-up time greater than 20ms. A wide input range (9-36V) DC-DC module is selected. Critical circuits are backed up with a supercapacitor (1F/5V). Software: Voltage dip detection uses digital filtering to avoid false alarms; important states are stored non-volatilely; watchdog reset. With this design, the FTU can pass the IEC 61000-4-11 voltage dip test (0% dip 100ms, 40% dip 1s) without malfunctioning or data loss during the test.