
HMI DC power supply filtering design should employ a multi-stage, frequency-band-based strategy. The first stage is a large-capacity energy storage filter at the input, typically using electrolytic capacitors. The capacitance value is calculated based on the system's maximum transient current and allowable voltage drop, used to suppress low-frequency ripple. The second stage is differential-mode/common-mode noise filtering, where a power bead or inductor, such as the PBZ3216E121Z0T, is connected in series along the power path, and a multilayer ceramic capacitor is connected in parallel to form an LC filter network, used to suppress switching frequencies and their harmonics. The third stage is chip-level decoupling, where MLCC capacitors of different capacitance values, such as 10μF, 0.1μF, and 100pF, are placed near the power pins of each IC to provide high-frequency current and suppress local noise generated during chip operation. For noise-sensitive analog circuits, RC or active filter circuits can be added to their power inputs. During design, it is crucial that the DC resistance (DCR) and saturation current (Isat) of the inductors and beads meet the load current requirements to avoid overheating or magnetic saturation failure. The equivalent series resistance (ESR) and equivalent series inductance (ESL) of capacitors should be as small as possible to improve high-frequency filtering performance. By properly configuring PBZ series ferrite beads and low-ESL capacitors from Etymotic, an effective DC power supply filtering network covering the entire frequency band from kHz to GHz can be constructed to ensure clean and stable power supply to all functional modules of the HMI.