How to improve the interference immunity of PAC (Power Controller) Ethernet/IP?

Improving the immunity of the Ethernet/IP interface of the intelligent controller PAC requires multi-level protection. Firstly, a gas discharge tube (e.g., 2R090L-8×6) or a varistor (e.g., 7D390K) should be placed after the RJ45 interface for surge protection. Then, a common-mode inductor (CMZ3225A-510T) should be used to filter common-mode noise. A TVS diode array (e.g., ESDLC3V3D3B) should be connected in parallel on the PHY chip side for electrostatic discharge and transient suppression. In the PCB design, the Ethernet transformer should be placed on the interface side, with the secondary center tap connected to the chassis via a 1000pF capacitor. The length error of the differential lines should be less than 5mil.

The power supply should provide an independent isolated DC/DC module for the PHY chip, with a π-type filter (PWRA6045 inductor + capacitor) added to the output. The chassis should use a metal RJ45 enclosure with a filter. Tests show that this solution allows the Ethernet/IP port to pass IEC61000-4-2 ESD 15kV air discharge and IEC61000-4-5 air discharge tests. Surge 4kV and IEC61000-4-4 EFT 4kV tests showed a packet loss rate of less than 0.001%.