How to reduce EMI leakage in PMS PCB vias?

Improperly designed vias on the PCB of a power supply system (PSS) can become channels for high-frequency electromagnetic energy leakage, especially when signal lines change layers or when via arrays exist at the edges of power planes. Key via design considerations to reduce EMI leakage include: controlling via stub length; for high-speed signals, prioritizing blind vias or back-drilling techniques to remove unwanted stubs; for through-layer vias, placing 1-2 grounding vias adjacent to signal vias to provide a path for return current, forming a coaxial-like structure; avoiding sharp corners at the connection between vias and copper traces, using teardrop pads instead; and placing a row of grounding vias as "via fencing" at PCB edges and shielding cavity openings, with a spacing less than λ/20 (e.g., less than 7.5mm for 1GHz) to suppress edge radiation. A similar via array should also be used at the edges of power planes to form edge coupling with the ground plane, reducing fringing fields. Furthermore, via sizes should not be too large, typically with an inner diameter of 0.2-0.3mm and an outer diameter of 0.4-0.6mm. Optimizing via design can reduce PCB radiation emissions by 5-10dB in the 1GHz band, improving overall shielding effectiveness.