
Shortening the physical length of the servo gate loop (driver chip output -> gate resistor -> IGBT gate -> IGBT source -> driver chip ground) is a fundamental method to reduce parasitic inductance and suppress gate ringing and overshoot. Eintech's implementation method: The driver chip and IGBT module are mounted on the same small PCB (driver board), directly stacked on top of the IGBT module via copper pillars. The gate resistor and necessary TVS (such as ESD5V0D3B) are directly soldered to the pads corresponding to the IGBT gate/emitter on the driver board, with a trace length <1cm. The driver chip's power decoupling capacitor (100nF C0G) must be placed close to its VCC and GND pins. The bottom layer of the entire driver board is set as a complete ground plane and directly connected to the IGBT emitter terminal (Kelvin pin) through multiple low-inductance vias. Through this "common substrate" design, the gate loop inductance can be reduced from a typical 50nH to below 10nH, thereby limiting the gate voltage spike to below 2V, significantly reducing switching noise and the risk of false triggering.