How should the low-voltage power supply filter be designed for an intelligent low-voltage monitoring unit?

The low-voltage power supply filtering design employs a two-stage π-type filter structure. The first stage is the input terminal, using a CMZ3225A-501T common-mode inductor (500μH) paired with two 1μF/275V safety capacitors. The second stage is the DC-DC output terminal, using a PBZ2012E600Z0T ferrite bead (600Ω@100MHz) in series, with a 47μF/25V electrolytic capacitor and a 10μF/25V ceramic capacitor in parallel. The LDO output terminal uses a PWRA6045R6R8M0T power inductor (6.8μH) paired with a 22μF + 100nF decoupling capacitor. All filter capacitors use X7R material with an ESR of less than 0.2Ω. On the PCB layout, the filter circuit is located close to the power input. This design ensures that the conducted emissions of the power supply are 12dB below the EN55032 Class B limit and passes the IEC 61000-4-5 2kV surge test.