How to suppress power frequency interference in intelligent low-voltage monitoring units?

Power frequency interference (50Hz) suppression employs a combination of digital filtering and hardware compensation. Hardware-wise, a parallel RC network (100Ω + 10nF) is connected to the secondary side of the current transformer, with a time constant matched to the power frequency cycle. The sampling circuit uses a dual-integrating ADC, such as the ICL7135, with the integration time set to an integer multiple of 20ms. Software-wise, a digital notch filter is used, attenuating the signal by more than 40dB at 50Hz. Simultaneously, twisted-pair cables with a 25mm twist pitch are used for the sampling lines to reduce magnetic field coupling. The PCB layout minimizes the sampling loop area. Through this suppression, the impact of power frequency interference on monitoring accuracy is less than 0.1%, meeting the IEC 61000-4-8 30A/m power frequency magnetic field immunity test requirements.