What are the challenges of the two-level energy storage system PCSEMC?

Two-level PCS topology is simple, but its EMC control challenges lie in the low-to-mid frequency range (especially the switching frequency and its low-order harmonics) and high common-mode voltage. Specific challenges include:

1. High dv/dt and common-mode voltage: Switching action generates a step change in the output phase voltage, and its high dv/dt produces a large common-mode current through the parasitic capacitance to ground of the motor or transformer, which is a major source of conducted and radiated EMI.

2. Large differential-mode noise amplitude: The DC bus voltage is directly reflected in the output line voltage, resulting in a high differential-mode noise voltage amplitude.

3. High filtering pressure: To suppress the above noise, large filter inductors (common-mode and differential-mode) and capacitors are required, which may increase size, cost, and losses. Attention must also be paid to the resonance problem of the filter in the low-frequency range.

Therefore, the EMC design focus of two-level PCS is on optimizing switching characteristics, designing efficient output filters, and properly handling grounding and shielding.