
In PCS, full-bridge and half-bridge topologies exhibit significant differences in EMC characteristics.
Full-bridge topology: The output phase voltage swing is equal to the DC bus voltage (+Vdc to -Vdc), and its common-mode voltage lies between the midpoints of the two bridge arms. If not properly controlled, its amplitude and rate of change can be high, but this can be improved through modulation strategies (such as unipolar frequency doubling modulation).
Half-bridge topology: The output phase voltage swing is half the DC bus voltage (0 to +Vdc), and its common-mode voltage is relatively fixed, theoretically more beneficial for reducing common-mode EMI. However, the half-bridge requires a larger DC bus capacitor to handle the second-harmonic pulsating current, and its power device voltage stress is the same as the full-bridge. From an EMC perspective, the common-mode noise of the half-bridge may be easier to control, but differential-mode noise filtering requires handling larger low-frequency pulsations. Actual differences are also significantly influenced by modulation methods, drive symmetry, and grounding strategies.