How to reduce EMI leakage using vias on a power DTU PCB?

Reducing EMI leakage from DTU PCB vias requires optimizing via design and layout. The ratio of via diameter to pad diameter should be controlled within 1:2, for example, a via diameter of 0.3mm and a pad diameter of 0.6mm. Place grounding vias next to high-speed signal vias to form a shielding array with a spacing less than λ/10. Use back-drilling to remove via stubs. For power vias, use multiple vias in parallel to reduce impedance. Ensure smooth transitions at via-signal line connections to avoid impedance abrupt changes. Analyze via radiation through simulation and optimize the design to achieve a radiation intensity below 40dBμV/m. In actual measurements, using a near-field probe to scan the via area, the leakage electric field should be below 30dBμV/m. Optimized via design can reduce EMI leakage by 15dB.