How to balance sampling accuracy and EMC in power FTU?

Balancing sampling accuracy and EMC requires a low-noise design and appropriate filtering.

Low-noise components were selected: AD8629 operational amplifier (4nV/√Hz noise) and ADS8568 ADC (SNR 92dB).

Filtering design: A second-order active filter was used, with a cutoff frequency slightly higher than the signal bandwidth (e.g., 2kHz) to ensure a flat amplitude-frequency response.

PCB layout: The sampling loop area was minimized, differential traces were used, and the circuit was kept away from interference sources.

Power supply decoupling: A 10μF + 100nF capacitor was placed near each power supply pin.

This design achieved a sampling accuracy of 0.1%, while meeting the IEC 61000-4-8 power frequency magnetic field immunity requirement of 100A/m.