Does the power ripple suppression of the industrial AI edge gateway meet the power supply requirements of the AI chip?

The industrial AI edge gateway AI chip is sensitive to power supply ripple. For example, the 1.2V core voltage requires a ripple of <30mV. The design uses a multi-phase BUCK converter. Each phase output is connected in series with a PBZ1608E600Z0T ferrite bead and a 4.7μF MLCC to form a π-type filter output. A 220μF tantalum capacitor is connected in parallel to reduce low-frequency ripple. At the same time, an RC snubber network with a 2.2Ω resistor and a 1nF capacitor is added to the switching node. The actual measured ripple is 18mV at 1.2V, 25mV at 3.3V, and 32mV at 5V under full load, all of which meet the chip datasheet requirements.