
High-frequency noise in a power supply system (PSS) (such as MHz-level harmonics in switching power supplies and digital clocks) requires an extremely low-impedance grounding path for effective discharge; otherwise, it will radiate or couple. The key to reducing high-frequency grounding impedance is minimizing inductance. Specific measures include: using large ground planes instead of thin traces, as the inductance of a plane is much smaller than that of a conductor. On the PCB, provide local grounding copper traces for critical chips (such as DC/DC converters and clock generators) and connect them to an inner full ground plane via multiple vias (at least four per square centimeter is recommended).
Grounding vias should use large diameters (e.g., 0.3 mm) and be placed as close as possible to the device's ground pins. For chassis grounding, adopt a "multi-point grounding" principle, connecting the PCB's grounding screw holes to the chassis at a spacing less than λ/10 (approximately 30 cm for 100 MHz) and using toothed locking washers. Use flat braided grounding wires, as their high-frequency impedance is lower than that of round wires. Additionally, a low-ESL ceramic capacitor (e.g., 1 μF, 0402 package) can be connected in parallel between power ground and signal ground to provide a high-frequency short-circuit path. These methods can reduce the grounding impedance in the 10MHz-100MHz frequency band to below 0.1Ω, significantly improving high-frequency noise suppression.