
Optimizing the radiated emissions levels of I/O modules requires addressing both source intensity suppression and radiation path blocking. First, identify the primary sources of radiation, typically including switching power supplies, high-speed digital circuits, and clock circuits. Add shielding to the switching power supply and ensure a compact PCB layout to minimize high-frequency loop area. Ground the clock signal and, if possible, connect a small resistor in series to mitigate edge noise. Use resistor arrays or ferrite bead arrays for high-speed data buses. Inspect all I/O cables to ensure their shielding is properly grounded, adding ferrite cores to the cables if necessary.
The module housing must be fully shielded, using conductive pads in gaps and waveguides for ventilation holes. At the PCB level, ensure critical signal layers have a complete ground plane for reference, and avoid power plane partitions beneath critical chips. Use a near-field probe to scan the PCB and cables to locate radiation hotspots and add targeted local shielding or filtering. If the excessive emissions are concentrated in a specific frequency band, it may be harmonics from a particular chip or clock; try adjusting its operating frequency or adding filtering. Optimization is an iterative process, typically requiring a combination of shielding, filtering, and PCB layout adjustments.