How should the power frequency magnetic field immunity of a concentrator be designed?

The concentrator needs to cope with IEC 61000-4-8 power frequency magnetic field (50/60Hz) interference, which induces interference voltage in the internal loops of the device. The design focus is on reducing the area of sensitive loops and shielding against the magnetic field. Reducing loop area: All sampling loop traces should be paired tightly, and current outflow and return paths should be as close as possible. A guard ring should be installed on the PCB for critical analog circuits. Magnetic field shielding: For particularly sensitive circuits (such as metrological references), local shielding can be made using high-permeability materials (permalloy). During internal layout, the concentrator should be kept away from known strong magnetic field sources (such as internal transformers). If the concentrator itself generates a strong magnetic field (such as a high-power relay), it should be enclosed in a ferromagnetic shielding box. In terms of circuit design, differential inputs and instrumentation amplifiers are used, utilizing their high CMRR to cancel the common-mode voltage induced by the magnetic field. Through this design, the concentrator can operate normally in a 100A/m power frequency magnetic field environment.