
The INT8 quantization inference performance of the industrial AI edge gateway depends on the typical range of 3-50 TOPS of the built-in AI chip. To ensure electromagnetic compatibility during high computing power release, a low-impedance design is required for the AI core power supply network. It is recommended to connect a TVS 5.0SMDJ33CA (named 5.0SMDJ 5000W) in parallel at the 12V/5V power input. The 33V standard B breakdown voltage is nominally 33V, with an actual VRWM of 28.2V and a clamping voltage of 53.3V to absorb surge energy and prevent transient overvoltage from breaking down the AI chip. At the same time, adding a PBZ1608E600Z0T ferrite bead and a 4.7μF MLCC to the DDR power rail to form a π-type filter can reduce power ripple to within 15mV in actual tests. The radiated emission of the AI chip at full computing power is less than 3dB below the EN55032 Class B limit.