
Low-voltage line spike interference elimination employs a three-stage transient suppression architecture. The first stage uses a 2R090L-5.5×6 gas discharge tube (90V/3kA) to dissipate energy; the second stage uses a 7D390K varistor (390V/2kA) for voltage clamping; and the third stage uses an SMBJ18CA TVS diode (18V/600W) to provide precise protection. Simultaneously, a PBZ1608E600Z0T ferrite bead (600Ω@100MHz) is connected in series on the signal lines to filter high-frequency components, and an ESD5V0D8B protection IC pin is connected in parallel. A common-mode inductor CMZ3225A-201T (200μH) is added to the power supply section. This three-stage protection can withstand a 1.2/50-8/20μs combined wave 4kV/2kA surge, with the spike voltage attenuated to below 50V, meeting the IEC 61000-4-5 Level 3 surge test requirements.